Senior ICE Emulation Design Engineer

The Senior Emulation Design Engineer position is your opportunity to join one of the industry’s leading companies in platform security management and ransomware detection for cloud datacenters, 5G infrastructure and disaggregated compute ecosystems. You will be responsible for converting large, complex SOC designs, including third-party IPs, into emulation-ready environments, enabling system level validation and debugging, software development and performance analysis. This role is critical for validating the interoperability of our design with commercial AI servers, and for bridging the gap between hardware and software, as well as supporting SW development.

Key Responsibilities

• Partition and synthesize large SOC RTL designs for emulation. Integrate internal and third-party IPs for emulation compatibility, and resolving timing, connectivity and other synthesis issues

• Setup and validate high-speed (e.g., PCIe, Ethernet, USB) and low-speed (e.g., I2C, SPI, UART) interfaces

• Configure host servers, boot environments to interact with the emulated design

• Integrate, develop and debug transactors, bridges and protocol adapters as needed

• Debug and root-cause embedded HW, SW and test failures in emulation

• Collaborate with RTL, DV and SW teams to resolve system level bugs

• Performance optimization

Department: Verification
Function: Engineering
Experience Level: Mid-Senior Level