FPGA Design Engineer at Arista Networks | Job-Scouts.com

FPGA Design Engineer

Arista Networks
full-time mid Roseville, CA, United States · More jobs in Roseville, California, United States
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Job Description

Who You’ll Work With

You will work closely with cross-functional hardware, software, and manufacturing engineering teams to innovate new system architectures and drive FPGA development from initial concept to final delivery.

What You’ll Do

Our Hardware Design Engineering team is at the forefront of developing high-speed networking and Ethernet products used in enterprise campuses, hyperscaler data centers, and bleeding-edge AI clusters. The team is responsible for the end-to-end design and development of advanced hardware solutions that meet the demands of modern networking environments.

As a core member of the FPGA Design and Verification team, you will drive the development of high-performance control path FPGAs powering Arista’s flagship data center platforms. You will own the full design lifecycle—from gathering architectural requirements and reviewing board schematics to executing rigorous verification, leading system bring-up, and supporting production deployment.

Responsibilities:

• RTL Development & Verification: Develop, integrate, simulate, and verify Verilog and SystemVerilog RTL code, including custom testbench creation.
• FPGA Flow Implementation: Execute the full FPGA development flow, including synthesis, place and route, timing closure, and in-system hardware debugging.
• System-Level Integration: Collaborate directly with hardware and software engineering teams to drive rapid bring-up and debugging of next-generation network switch platforms.
• Design & Architecture Reviews: Actively participate in peer RTL code reviews, as well as PCB schematic and board design reviews.
• Toolchain Automation: Develop AI-skills, Python, Tcl, or shell scripts to streamline data processing and automate FPGA design workflows.
Concepts & Skills You Will Gain

• Switching Architectures: Master data and control path architectures in modern Ethernet switches, alongside critical I/O interfaces (e.g., PCIe, Interlaken, Ethernet PHY/MAC, SMBus, SPI, MDIO, JTAG).
• Networking Protocols: Gain hands-on experience with Ethernet-based protocols, including PTP, sFlow, and PoE.
• Practical FPGA Engineering: Learn to navigate real-world design challenges, including tight timing closure, resource optimization, clock domain crossing, and complex state machine design.
• Multi-Vendor Ecosystems: Develop expertise across major vendor FPGA architectures, toolchains, and IDEs.
• Cross-Functional System Design: Build skills in interpreting complex PCB schematics, running advanced simulation frameworks, and solving multidisciplinary hardware/software challenges.

Requirements

Department: Hardware Engineering
Function: Manufacturing
Experience Level: Mid-Senior Level

Location

Roseville, CA, United States
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