Staff Package Design Engineer - MIS substrate/FC expose die ( Experienced in Power or Gan is requried ) at Renesas Electronics | Job-Scouts.com

Staff Package Design Engineer - MIS substrate/FC expose die ( Experienced in Power or Gan is requried )

Renesas Electronics
full-time lead Taipei, Taiwan
This position is sourced from Renesas Electronics's career page . Apply through Job-Scouts to track your application status.

Job Description

Key Responsibilities

• Benchmark, select and qualify suitable materials, processes and assembly subcontractors (OSAT) or contract manufacturers (CM).

• Work with OSAT/CM  to develop, run DOE to optimize processes, establish process spec & monitor and resolve process issues early in the production to ensure only parts with superior quality shipped to customer.

• Work with Product groups and Reliability team, qualify new packages and processes within required time frame & further address internal and external customer complains working with peers of Marketing, Product groups, Quality and Operations organization to satisfy growth in businesses.

• Ensure smooth transition into production & implement ramp up monitor.  

• Participate in packaging roadmap development & focus on execution, develop and maintain technical expertise on advances and innovations in power SiP/modules, wafer level packaging, flip chip interconnects and panel level package.

• Establish & maintain package design rules.

Requirements

Function: Engineering
Experience Level: Mid-Senior Level

Location

Taipei, Taiwan

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