Senior PCB Layout Engineer – Automotive HPC Embedded Platforms

Job Description

Own PCB layout implementation for automotive HPC and chiplet-based platforms, translating approved schematics, electrical constraints, and mechanical requirements into manufacturable multilayer and HDI board designs. Deliver release-ready layouts that meet signal integrity, power integrity, reliability, and fabrication requirements.

Key Responsibilities:

• Own component placement, fine-pitch BGA escape routing, and detailed routing for multilayer and HDI PCBs used in automotive HPC and chiplet-based systems.
• Implement constraint-driven routing for DDR/LPDDR, PCIe, Ethernet, and SerDes, controlling impedance, length matching, differential-pair geometry, crosstalk, and return paths in collaboration with SI/PI engineers.
• Define PCB stack-ups, material requirements, via structures, and HDI build-up with hardware, SI/PI, mechanical, and fabrication teams, balancing electrical performance, reliability, and manufacturing capability.
• Implement power and ground planes, decoupling placement, and power routing to agreed current-carrying, thermal, EMI/EMC, and power integrity requirements using Cadence Allegro, Altium Designer, or equivalent ECAD tools.
• Create and verify component footprints, pad stacks, and ECAD library data; maintain layout databases and controlled design revisions throughout the release process.
• Prepare fabrication and assembly release packages, including Gerber/ODB++ data, drill files, stack-up specifications, fabrication and assembly drawings, placement data, and associated BOM documentation.
• Conduct layout reviews, design-rule checks, and DFM/DFA/DFT checks; resolve fabrication and assembly queries with suppliers and implement agreed layout corrections in line with applicable automotive requirements and processes.
• Maintain PCB layout guidelines, checklists, and release documentation; communicate layout risks, design trade-offs, and delivery status proactively to cross-functional teams.

Function: Information Technology
Experience Level: Mid-Senior Level