Principal DFT Engineer

We are looking for an experienced DFT Lead to own end-to-end Design-for-Test activities for complex Automotive MCU/SoC products. The role will drive DFT architecture, implementation, verification, and production-test readiness while working closely with SoC Design, Verification, PTE, Product and Test Engineering teams.

Key Responsibilities

• Own the DFT architecture and strategy for automotive MCU/SoC products from specification through silicon production readiness.
• Define and implement DFT solutions including scan architecture, compression, memory BIST, logic BIST, boundary scan/JTAG and test access architecture, as applicable.
• Drive DFT implementation and associated RTL/design updates, working closely with SoC, IP and RTL design teams.
• Own DFT verification and simulation, including test-mode validation, scan/MBIST connectivity, ATPG-related simulations and gate-level verification.
• Drive ATPG and pattern generation, validation and release of production-ready test patterns to Product and Test Engineering teams.
• Act as the primary technical interface with PTE/Product/Test teams for DFT, test-pattern and silicon-test requirements.
• Work with design teams to define and align DFT requirements, test modes, clocks, resets, power domains, constraints and chip-level integration requirements.
• Review DFT coverage, pattern count, test time and testability metrics, and drive closure of coverage gaps.
• Support silicon bring-up, pattern debug, test failures and yield-related DFT investigations.
• Own DFT deliverables, reviews, sign-off criteria and milestone tracking across the product development lifecycle.
• Identify DFT-related technical and schedule risks early and drive cross-functional closure.

Function: Engineering
Experience Level: Mid-Senior Level