Sr Dir, Product Mgmt
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Job Description
What You'll Do
• Own the end-to-end definition of Renesas' next-generation MPU platform strategy — the family architecture, derivative and segmentation strategy, and the roadmap that must serve Industrial, Physical AI/robotics, multi-modal AI, and general-purpose embedded markets simultaneously.
• Build, lead, and grow the Platform team of IP planners and solution definers — today spanning industrial solution planning, robotics solution planning, DDR/memory sub-system planning, multi-modal/vision IP planning, performance benchmarking, and entry-level platform planning — hiring, mentoring, and setting the technical bar for the organization.
• Turn requirements arriving from Product Line leads, regional business teams, key accounts, and technology domain owners into one prioritized, traceable platform baseline — which means being able to say no to a legitimate ask, explain the reasoning in terms stakeholders respect, and keep the relationship intact afterward.
• Arbitrate resource allocation across the die: area, power, memory bandwidth, and schedule are finite, and every domain — vision, multi-modal/AI acceleration, industrial connectivity, memory, security — will ask for more than the budget allows. You frame the options, quantify the cost of each, and drive the decision.
• Set and enforce the team's standards for IP make-versus-buy-versus-license analysis, technical due diligence, and requirement sign-off, so every major IP decision across the platform is made with rigor and the reasoning is visible.
• Own the platform business case together with Finance and the Business Unit: volume and mix assumptions, cost and margin modeling, pricing structure, and lifecycle and longevity commitments.
• Own the platform-level security and functional safety strategy — secure boot, root of trust, key management, target standards and integrity levels, and the certification roadmap — and keep it aligned to where regulation and customer expectations are heading.
• Partner with engineering leadership (SoC/IP architecture, design, verification, physical implementation, software/BSP) on feasibility, budget consumption, and what the schedule and process node will actually support.
• Represent the platform strategy to executive leadership, at business and investment reviews, and directly to lead customers and field teams when the platform thesis needs defending in the room.
• Maintain the competitive and technology landscape view at the platform level — competing MPUs and SoCs, the ecosystems and software stacks customers evaluate alongside silicon, and where the next real inflection is coming from.
How You'll Collaborate
This role sits at the center of the EPAIAP platform and only works if you are effective across boundaries you do not directly control.
• With your team: IP planners and solution definers across vision/multi-modal, industrial, robotics, memory, and performance benchmarking — you set direction, unblock decisions, and are accountable for the quality and coherence of everything the team produces.
• With Product Line leads (Vision & Edge/Physical AI, Real-Time & Industrial Networking, General Purpose): translating segment and application requirements into the platform baseline, and negotiating what belongs in the base platform versus a derivative.
• With Central Functions peers: Pathfinding & Technical Assistant on future technology bets, Execution & PMO on schedule and delivery, and Edge AI/Product SW & Chief of Staff on software enablement and cross-organization alignment.
• With engineering, quality, security/functional safety, operations/supply chain, and finance: on feasibility, certification, reliability, cost, and the business case.
• Externally: IP and CPU vendors, ecosystem and software partners, and lead customers whose requirements ultimately have to be reflected — or knowingly traded off — in the platform you ship.
What You'll Bring
• 12+ years of experience in semiconductor or embedded product planning, SoC/platform architecture, or IP planning, including significant experience defining or architecting MPU/SoC platforms that shipped and won in the market.
• Demonstrated people leadership — you have built, hired for, or run a high-performing technical planning or architecture team, not just contributed as an individual expert.
• Broad technical range across the IP domains this platform touches — vision and multi-modal sensing, AI acceleration, memory/DDR sub-systems, connectivity, and security — with enough depth to be credible with specialists in each, even where you are not the deepest expert.
• A proven track record of arbitrating cross-domain trade-offs where every option disappoints someone, and of keeping the organization aligned to the decision afterward.
• Commercial fluency: cost structure, margin, segmentation, pricing, and how multi-year product lifecycles change the calculus.
• Executive presence — the ability to defend a platform strategy and its trade-offs to senior leadership, to the board of a business review, and to a room of skeptical architects, often in the same week.
• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field; advanced degree preferred.
Requirements
Function: Manufacturing
Experience Level: Executive