Sr Digital Engineer
Job Description
Renesas is seeking an experienced Senior Digital Engineer to develop and execute verification for control-loop features and functions in advanced digital power management products used in AI, datacenter, and high-performance computing applications.
This role focuses on verifying that specific control-loop features behave as intended across behavioral models, digital implementation, analog interactions, simulation, emulation, bench validation, and silicon.
The successful candidate will translate feature requirements into measurable test scenarios, execute verification plans, analyze results, and help correlate behavior across engineering environments. The role requires a solid understanding of digital control loops, mixed-signal systems, power-system behavior, data analysis, and verification automation.
The ideal candidate combines hands-on engineering experience with disciplined verification practices and the ability to investigate differences between expected behavior, implementation results, and measured performance.
WHY THIS ROLE MATTERS
• Create clear, repeatable verification evidence that control-loop features and functions operate as intended.
• Improve confidence in feature implementation by connecting requirements, models, tests, and measured results.
• Identify feature-level issues and unexpected interactions before they become product or customer problems.
• Develop reusable test methods that improve verification quality and reduce repeated manual effort.
KEY RESPONSIBILITIES
• Develop and execute verification plans for digital control-loop features and functions.
• Translate feature requirements and system intent into measurable test scenarios and pass/fail criteria.
• Verify control-loop behavior across operating conditions, configurations, limits, sequencing, and corner cases.
• Develop tests covering compensation, stability, bandwidth, transient response, latency, sampling, quantization, saturation, mode transitions, sensing behavior, telemetry, protection, and feature interactions.
• Analyze feature behavior using behavioral models, RTL simulations, analog/mixed-signal simulations, emulation, bench measurements, and silicon results where applicable.
• Correlate results across models, simulation, emulation, bench validation, and silicon to identify differences and support engineering decisions.
• Evaluate interactions between digital loop functions and analog components, including sensing paths, ADCs, DACs, references, PWM generation, timing paths, and power stages.
• Produce clear verification evidence that documents test conditions, configurations, metrics, plots, waveforms, results, and conclusions.
• Develop and maintain automation for parameter sweeps, corner testing, waveform analysis, regression testing, and verification reporting.
• Investigate discrepancies between expected feature behavior and results obtained from simulation, emulation, bench testing, or silicon.
• Collaborate with systems, analog design, digital design, firmware, design verification, validation, applications, and software/tool teams.
• Identify missing requirements, test coverage, observability, or infrastructure that could prevent effective feature verification.
• Document test intent, assumptions, test configurations, results, limitations, and identified risks clearly.
Requirements
Function: Engineering
Experience Level: Mid-Senior Level