Senior Staff Digital Systems & Emulation Engineer

Renesas is seeking an experienced Senior Staff Digital Systems & Emulation Engineer  to develop and drive advanced pre-silicon emulation and digital system validation for next-generation power management products targeting AI, datacenter, and high-performance computing applications. 

This role will focus on bridging system architecture, digital design, FPGA/emulation, control algorithms, and hardware validation, enabling complex digital power-management functions to be exercised and validated ahead of silicon availability. 

The successful candidate will combine strong digital design fundamentals with hands-on FPGA and emulation expertise and a working knowledge of digital signal processing and control techniques. The engineer will work closely with System Architecture, Digital Design, Firmware, Design Verification, Analog/Mixed-Signal Design, Applications, and Validation teams to translate product requirements and algorithms into executable real-time prototypes. 

The position is a senior individual-contributor role with significant technical ownership and influence on emulation architecture, methodology, and future development platforms. 

Key Responsibilities 

Emulation & FPGA Development 

• Architect, develop, and maintain FPGA-based emulation platforms for advanced digital power controllers and mixed-signal power-management products. 

• Map and integrate production or representative RTL into FPGA/emulation environments for pre-silicon feature development and validation. 

• Develop reusable FPGA infrastructure, interfaces, test capabilities, and debug methodologies supporting multiple product generations. 

• Develop and improve build, configuration, automation, and debug flows to make emulation environments accessible and repeatable across engineering teams. 

• Support integration of FPGA/emulated controllers with real power stages, loads, instrumentation, and system-level hardware. 

• Identify differences between ASIC and FPGA implementation and develop appropriate strategies to maintain meaningful system-level behavior and correlation. 

Digital Systems & RTL 

• Understand and contribute to digital system architecture, microarchitecture, and RTL implementation where required. 

• Analyze timing, latency, clock-domain, interface, datapath, and real-time execution requirements relevant to system behavior. 

• Develop or modify synthesizable RTL blocks required for emulation, instrumentation, prototyping, and architectural exploration. 

• Support integration and debug of digital interfaces, ADC/DAC data paths, PWM generation, telemetry, protection functions, state machines, and embedded control logic. 

• Work with Digital Design and Verification teams to correlate behavior between behavioral models, RTL simulation, emulation, and silicon. 

DSP & Control Algorithm Implementation 

• Support implementation and evaluation of digital control and signal-processing functions used within power-management systems. 

• Translate mathematical or system-level algorithms into practical fixed-point and real-time digital implementations. 

• Evaluate effects of sampling rate, latency, quantization, numerical precision, filtering, and computational architecture on system performance. 

• Implement and evaluate digital filters, signal conditioning, control-loop functions, and related DSP algorithms where required. 

• Collaborate with system architects to rapidly prototype new algorithms before committing them to production RTL. 

System-Level Validation 

• Develop system-level emulation scenarios representing realistic customer use cases and operating conditions. 

• Define measurable pass/fail criteria and validation methodologies for new architectural features. 

• Correlate emulation results with simulation, behavioral models, bench measurements, and silicon measurements where available. 

• Support pre-silicon validation of control-loop behavior, transient response, telemetry, protection mechanisms, sequencing, communication interfaces, and other system-level functions. 

• Perform detailed debug across hardware, RTL, firmware, and system boundaries to identify root causes of complex issues. 

Methodology & Technical Leadership 

• Define and improve methodologies for FPGA prototyping and emulation of mixed-signal and digitally controlled power systems. 

• Develop reusable architectures, automation, scripts, and engineering workflows that reduce setup and debug time. 

• Participate in architecture, design, and verification reviews and provide technical guidance on emulation feasibility and implementation trade-offs. 

• Work independently on complex technical problems and drive issues to resolution across organizational boundaries. 

• Mentor engineers in FPGA, digital design, emulation, and system-debug techniques. 

• Document architecture, implementation, test methodology, limitations, and results to enable reuse across programs.

Function: Engineering
Experience Level: Mid-Senior Level